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Full-timeOn-siteEngineeringactive

Staff Engineer, Serdes Analog Design

Samsung SemiconductorSan Jose, CA, United StatesPosted November 12, 2026

Job Description

1. Job Overview:

Samsung Semiconductor Inc. (SSI) is advancing the world’s technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. Our technology solutions power tools used every day — including smartphones, electric vehicles, hyperscale data centers, IoT devices, and more. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

Role purpose: The Staff Engineer, Serdes Analog Design will actively work on the architecture and circuits of high-speed interconnect transceivers (Serdes), Serdes IPs, clock generation, and traditional analog circuits. The role contributes to developing high-performance, low-power SerDes and related interfaces using cutting-edge process technologies.

2. Key Responsibilities:

  • Actively work on architecture and circuits of high-speed interconnect transceiver (Serdes).
  • Work on circuits for Serdes IPs, clock generation as well as traditional analog circuits.
  • Work with a team to develop high-performance and low-power serdes, including display interface, camera sensor interface, UCIe / die-to-die interconnect and 224/448Gbps UA-link/Ethernet using cutting-edge process technologies.
  • Design low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies.
  • Translate component design specification to schematics.
  • Build simulation test-benches to evaluate circuit performance, functionality, power consumption and reliability.
  • Supervise layout designers to generate LVS/DRC clean layout.
  • Optimize layout to improve the power consumption and performance of circuits.
  • Perform functionality and performance validation in Silicon.

3. Required Qualifications:

  • Bachelors with 10+ years, Masters with 8+ years or PhDs with 5+ years of experience.
  • Minimum 2+ years experience in RF/Analog/Serdes SoC design experience.

4. Required Skills:

  • Knowledge and experience with analog circuits / mixed-signal circuits such as bandgap, LDO, filters.
  • Knowledge and experience with circuits of Serdes IPs: CTLE, DFE, FFE, clock distributions, PI, IQ generation.
  • Knowledge of Serdes architecture and high-speed interconnect standards (USB, PCIe, UCIe).
  • Well-versed in EDA tools (Cadence, Spectre, Totem, EMX).
  • Comfortable with scripting languages (Python, Matlab).
  • Inclusive and adaptable in working style across diverse global norms.
  • Avid learner who approaches challenges with curiosity and resilience and seeks data to build understanding.
  • Collaborative: builds relationships, humbly offers support and welcomes diverse approaches.
  • Innovative and creative: proactively explores new ideas and adapts quickly to change.

5. Preferred Qualifications:

  • Knowledge and experience with ESD, PLL, clock generation, ADC, DAC is a big plus.

6. Experience Requirements:

  • Bachelors: 10+ years of experience required.
  • Masters: 8+ years of experience required.
  • PhD: 5+ years of experience required.
  • Additionally: Minimum 2+ years experience in RF/Analog/Serdes SoC design.

7. Additional Job Information:

  • Employment type: Not explicitly specified in the job posting.
  • Work mode: Daily onsite presence at our San Jose, CA headquarters in alignment with our Flexible Work policy (On-site).
  • Notice period: Not specified in the job posting.
  • Locations: San Jose, CA; Santa Clara County, CA; California, United States.
  • Application instructions and hiring notes from employer text:
  • To provide the best candidate experience amidst high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
  • Recruiting Agency Policy: Samsung Semiconductor does not accept unsolicited resumes. Only authorized recruitment agencies with a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings.
  • Applicant AI Use Policy: Candidates may use AI tools only for basic preparation, grammar, and research. AI should not be used to generate or assist with submitted content or live interview responses; misuse may result in pausing or ending the interview and possible disqualification.
  • By submitting an application, applicants agree not to disclose or encourage use of confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity.

(For more details on applying or to submit an application, please refer to the employer's official job posting and application process.)

Skills & Competencies

Serdes / High-speed interconnect designAnalog / Mixed-signal circuits (bandgapLDOfilters)EDA tools (CadenceSpectreTotemEMX)Python / Matlab scripting

Job Overview

Job TypeFull-time
Work TypeOn-site
Job FunctionEngineering
IndustryEngineering
LocationSan Jose, CA, United States
Posted DateNovember 12, 2026
Country Eligibility

Applications accepted from candidates residing in United States only.

Ready to Apply?

Submit your application for this opportunity with Samsung Semiconductor.